
This Principal Product Engineer role within Cadence's Digital and Signoff Group serves as a critical liaison between R&D, application engineering, and global customers. The position focuses on influencing the next generation of chip design software for advanced nodes at 7nm and below. Key responsibilities include acting as the primary technical resource for place-and-route challenges, collaborating with R&D to resolve software issues, and executing competitive benchmarks to demonstrate performance advantages. The role also involves developing custom RTL-to-GDSII methodologies and partnering with marketing to align technical capabilities with market needs. This position appeals to innovators seeking to solve complex physical design challenges in a high-impact environment. It offers the opportunity to work with cutting-edge EDA tools and scripting languages while contributing to industry-defining technology.























