
This Software Engineer role within the Silicon Validation team focuses on system-level stress validation for next-generation SoCs. The position involves diving deep into SoC architecture to exercise interactions between IP blocks and developing comprehensive testing strategies for stress and corner-case scenarios. Key responsibilities include writing C/C++ and assembly code close to the hardware, debugging complex issues, and utilizing scripting languages to automate validation processes. The role appeals to candidates passionate about hardware-software integration and offers the opportunity to work with a diverse team of subject matter experts on products reaching millions of users. The position requires a background in computer or electrical engineering and is ideal for those who enjoy a detail-oriented, persistent approach to ensuring high-quality functional products.


















