
This full-time contract role involves serving as an ASIC Physical Design Engineer for a Fortune 500 semiconductor company in Minneapolis. The position focuses on advanced node design, specifically handling floorplanning, power integrity, timing closure, and physical verification using Cadence tools. Key responsibilities include managing end-to-end tape-out ownership, defining module interfaces, and supporting PHY implementation from concept through final design. The role appeals to self-driven engineers seeking high ownership in a low-support environment with potential for permanent conversion. While onsite work is preferred in Minneapolis, remote candidates may be considered, and the position offers significant career growth within a challenging, evolving technical landscape.



















