
This Software Engineer role within the Silicon Validation team focuses on system-level stress validation for next-generation SoCs. The position involves diving deep into SoC architecture to exercise interactions between IP blocks and developing comprehensive test strategies for stress and corner-case scenarios. Key responsibilities include writing C/C++ and assembly code close to the hardware, debugging complex issues, and mastering the internal SiVal software stack. The role appeals to detail-oriented engineers passionate about computer architecture and hardware interaction, offering the opportunity to work with a diverse group of subject matter experts. While experience in graphics, video, or scripting is beneficial, the team welcomes candidates from junior to senior levels who are eager to contribute to high-quality product delivery.
















