Senior FPGA Design Engineer
Not Disclosed•Full-TimeOn-site
location_onCostco, 1709, Automation Parkway, San Jose, Santa Clara County, California, 95131, United States
About the Company
Axiado is one of the industry's leading companies in platform security management and ransomware detection. We secure cloud datacenters, 5G infrastructure, and disaggregated compute ecosystems, providing critical protection for modern digital environments.
About the Role
As a Senior FPGA Design Engineer, you will join the Engineering organization to drive design, verification, debug, and system integration efforts. This role is pivotal in bridging the gap between hardware architecture and software implementation. You will work closely with the Architecture, Verification, ASIC Design, and Software teams to bring up and validate FPGA system products. Your work will directly impact the reliability and performance of our security solutions across complex compute ecosystems.
Hiring Process
Candidates selected for this role will engage with our Engineering organization to discuss their experience in RTL design, FPGA prototyping, and computer architecture. The process focuses on technical depth and the ability to collaborate across cross-functional teams to solve complex hardware challenges.
Equal Opportunity
We are an equal opportunity employer committed to building a diverse and inclusive team.
Work location
Work model: On-site
Costco, 1709, Automation Parkway, San Jose, Santa Clara County, California, 95131, United States
San Jose, California
Key Responsibilities
- check_circleSet up and execute FPGA simulation and testing
- check_circleCollaborate with software teams to bring up and validate FPGA system products
- check_circlePerform FPGA system setup, validation, and debug
- check_circleDesign RTL for FPGA including porting, IP integration, timing closure, and bitstream generation
Requirements
- verifiedRTL design
- verifiedFPGA prototyping
- verifiedcomputer architecture
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Frequently asked questions about Senior FPGA Design Engineer at Axiado Corporation
What does a Senior FPGA Design Engineer at Axiado Corporation do?expand_more
Day-to-day, the Senior FPGA Design Engineer at Axiado Corporation will set up and execute fpga simulation and testing; collaborate with software teams to bring up and validate fpga system products; perform fpga system setup, validation, and debug; and design rtl for fpga including porting, ip integration, timing closure, and bitstream generation.
What are the requirements for this Senior FPGA Design Engineer role?expand_more
To qualify for the Senior FPGA Design Engineer at Axiado Corporation position, applicants should have: RTL design; FPGA prototyping; and computer architecture.
Where is the Senior FPGA Design Engineer role at Axiado Corporation located?expand_more
Senior FPGA Design Engineer at Axiado Corporation is based in Costco, 1709, Automation Parkway, San Jose, Santa Clara County, California, 95131, United States. This is a on-site role.
Is this Senior FPGA Design Engineer job remote, hybrid, or on-site?expand_more
Axiado Corporation has listed this Senior FPGA Design Engineer role as on-site.
How much experience is required for this Senior FPGA Design Engineer role?expand_more
Candidates for Senior FPGA Design Engineer at Axiado Corporation should have senior.
What skills do you need for the Senior FPGA Design Engineer role at Axiado Corporation?expand_more
Key skills for Senior FPGA Design Engineer at Axiado Corporation include RTL Design; Fpga Prototyping; Computer Architecture; RTL Porting; Ip Integration; Fpga Simulation; Fpga System Setup; and Fpga System Validation.
What category does the Senior FPGA Design Engineer role belong to?expand_more
Senior FPGA Design Engineer at Axiado Corporation is part of the engineering job category on Recrutus.