
location_on690, South 13th Street, Downtown, Boise, Ada County, Idaho, 83702, United States
Our vision is to transform how the world uses information to enrich life for all. As a world leader in innovating memory and storage solutions, we accelerate the transformation of information into intelligence, inspiring the world to learn, communicate, and advance faster than ever.
As a Layout Engineer in the DDEG team, you will translate schematics into manufacturable layouts that meet design intent, process rules, and schedule commitments for advanced DRAM. You will work closely with Design, Process Integration, and CAD teams to floorplan, implement, and verify custom digital, memory, and analog circuits.
In this role, you will play a crucial part in developing layouts for critical custom, memory, analog, or standard cell circuits, ensuring predictable, on-time delivery of memory designs. You will tackle ambiguous problems, prototype solutions without a playbook, and then codify them into guides and SOPs to share with the team. Your work will drive measurable productivity gains by integrating automated layout solutions and shaping the future of layout design.
Candidates are encouraged to use AI tools to enhance their resume and application materials, provided all information is accurate and reflects true skills and experiences. Misuse of AI to fabricate qualifications will result in immediate disqualification.
For US sites only, if you require assistance with the application process or reasonable accommodations, please contact Micron's People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3).
Micron is proud to be an equal opportunity workplace and an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity, or any other factor protected by applicable federal, state, or local laws.
Micron is dedicated to your personal wellbeing and professional growth. We offer a robust benefits package including medical, dental, and vision plans, paid time off, and paid holidays. We also provide programs to protect your income if you are unable to work due to illness or injury, as well as paid family leave.
Micron prohibits the use of child labor and complies with all applicable laws and international labor standards. We do not charge candidates any recruitment fees or unlawfully collect payments as consideration for employment.
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For more information about Micron, please visit micron.com/careers.
Work model: On-site
690, South 13th Street, Downtown, Boise, Ada County, Idaho, 83702, United States
Boise, Idaho
3+ years of semiconductor custom/memory/analog layout experience with demonstrated block/project leadership, including mentoring and schedule management. DRAM/LPDDR/HBM memory product layout background. Scripting (SKILL, Python) and experience building methodology/automation. Strong collaboration skills across global, multi-functional teams; excellent written documentation abilities.
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Skills: Cadence Virtuoso VXL, Calibre, DRC, LVS, Cmos, Skill, Python, Semiconductor Layout, Memory Layout, Analog Layout.
Education: Bachelor's Degree or equivalent experience in Electrical/Computer Engineering.